The original flash technology, SLC (Single Level Cell) NAND stores one data bit (single level) in each cell. To produce better bit density and increase capacity, MLC (Multi-Level Cell) NAND was developed which can store two bits of information in the same physical location that SLC stores one bit
But MLC has Lower Endurance. All flash devices can sustain a finite number of writes and erasures, also called program/erase cycles, or (P/E cycles). Partly because MLC media stores twice the information in the same physical space, its maximum endurance (measured in P/E cycles) is significantly lower than SLC media, by roughly a factor of 10. In NAND flash storage, cost is a function of endurance -- the faster a device wears out, the more often it must be replaced. This endurance issue reduces the cost advantages MLC enjoys.
A common way to express lifespan is in Total Bytes Written (TBW), which is a product of the P/E cycles and the capacity of the flash device itself. Aside from MLC’s lower TBW, some of the characteristics of flash storage applications can exacerbate its endurance problem. Processes like caching and storage tiering generate more P/E cycles, hastening wear out. Also, the shrinking lithographies inherent in the evolution of semiconductor-based products, like flash memory, increase bit errors that further reduce useful life.
NAND flash stores the information by controlling the amount of electrons in a region called a “floating gate”. These electrons change the conductive properties of the memory cell (the gate voltage needed to turn the cell on and off), which in turn is used to store one or more bits of data in the cell. This is why the ability of the floating gate to hold a charge is critical to the cell’s ability to reliably store data.
When written to and erased during the normal course of use, the oxide layer separating the floating gate from the substrate degrades, reducing its ability to hold a charge for an extended period of time. Each solid-state storage device can sustain a finite amount of degradation before it becomes unreliable, meaning it may still function but not consistently. The number of writes and erasures (P/E cycles) a NAND device can sustain while still maintaining a consistent, predictable output, defines its endurance.
NAND wear is a fact of life in flash storage products, and a result of normal operation. Endurance of the cells, and ultimately the lifespan of the storage product itself, is increased by minimizing this wear and improving the device’s ability to consistently read data despite this normal degradation. Advanced SSD controller technologies, like STEC’s CellCare, can significantly increase MLC flash endurance by utilizing sophisticated write and erase processes that reduce NAND cell wear, as well as the use of software routines, like DSP, and sophisticated error correction algorithms to increase read reliability.
But MLC has Lower Endurance. All flash devices can sustain a finite number of writes and erasures, also called program/erase cycles, or (P/E cycles). Partly because MLC media stores twice the information in the same physical space, its maximum endurance (measured in P/E cycles) is significantly lower than SLC media, by roughly a factor of 10. In NAND flash storage, cost is a function of endurance -- the faster a device wears out, the more often it must be replaced. This endurance issue reduces the cost advantages MLC enjoys.
A common way to express lifespan is in Total Bytes Written (TBW), which is a product of the P/E cycles and the capacity of the flash device itself. Aside from MLC’s lower TBW, some of the characteristics of flash storage applications can exacerbate its endurance problem. Processes like caching and storage tiering generate more P/E cycles, hastening wear out. Also, the shrinking lithographies inherent in the evolution of semiconductor-based products, like flash memory, increase bit errors that further reduce useful life.
NAND flash stores the information by controlling the amount of electrons in a region called a “floating gate”. These electrons change the conductive properties of the memory cell (the gate voltage needed to turn the cell on and off), which in turn is used to store one or more bits of data in the cell. This is why the ability of the floating gate to hold a charge is critical to the cell’s ability to reliably store data.
When written to and erased during the normal course of use, the oxide layer separating the floating gate from the substrate degrades, reducing its ability to hold a charge for an extended period of time. Each solid-state storage device can sustain a finite amount of degradation before it becomes unreliable, meaning it may still function but not consistently. The number of writes and erasures (P/E cycles) a NAND device can sustain while still maintaining a consistent, predictable output, defines its endurance.
NAND wear is a fact of life in flash storage products, and a result of normal operation. Endurance of the cells, and ultimately the lifespan of the storage product itself, is increased by minimizing this wear and improving the device’s ability to consistently read data despite this normal degradation. Advanced SSD controller technologies, like STEC’s CellCare, can significantly increase MLC flash endurance by utilizing sophisticated write and erase processes that reduce NAND cell wear, as well as the use of software routines, like DSP, and sophisticated error correction algorithms to increase read reliability.
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